Hardware description¶

This section of the documentation specifies and describes the nRF52840 Connect Kit mainly from a hardware point of view.

Hardware diagram¶

The following figure illustrates the nRF52840 Connect Kit hardware diagram. The design is available in Chip antenna and U.FL receptacle options, both have most of the same components except the antenna interface.

Mechanical dimensions¶

nRF52840 Connect Kit is a single sided 55.88mm x 20.32mm (2.2" x 0.8") 1mm thick PCB with a USB Type-C port and dual castellated/through-hole pins.

Power supply¶

nRF52840 Connect Kit can be powered by either the USB-C port or alternatively VSYS pin with wide input voltage range (1.8-5.5V). An on-board buck-boost converter (TPS63802) provides 3V3 to the nRF52840 SoC and all other peripherals.

The following figure illustrates the power supply circuitry:

VBUS is the 5V input from the USB-C port. There is a Schottky diode between VBUS and VSYS, which adds flexibility by allowing power ORing of different supplies into VSYS.

Set 3V3_EN HIGH to enable 3V3 output and LOW to disable 3V3 output. This pin has a pull-up resistor (100KOhm) and can be tied to GND to place the board in Power-Down mode.

Set MODE LOW for power save mode and HIGH for forced PWM mode. This pin is tied to P1.13 with a pull-down resistor (100KOhm).

Voltage measurement¶

nRF52840 Connect Kit uses one ADC input (AIN0) and a voltage divider to measure the voltage of VSYS. AIN0 measures the voltage over the lower resistor and P1.14 is used to enable the voltage measurement. The voltage measurement circuitry is shown in the following figure:

General purpose I/Os¶

There are up to 32 multi-function General Purpose I/Os (7 can be used as ADC inputs) available on the header pins. These GPIOs are powered from the on-board 3.3V rail, and should be used for 3.3V logic level. Any GPIO can be mapped to a digital peripheral (such as UART, SPI, TWI, PDM, I2S, QSPI, PWM and QDEC) for layout flexibility.

The following figure illustrates the GPIOs pinout:

Buttons and LEDs¶

There are two buttons, one Green LED and one RGB LED connected to dedicated GPIOs on the nRF52840 SoC. The following table shows the Button and LED connections:

External memory¶

The nRF52840 SoC has access to an additional 64 Mb of flash memory (MX25R6435F) which is a multi-I/O memory supporting both regular Serial Peripheral Interface (SPI) and Quad SPI (QSPI).

The memory is connected to the nRF52840 SoC using the following GPIOs:

2.4GHz antenna¶

nRF52840 Connect Kit has Chip antenna and U.FL receptacle options available to support various applications:

• For most applications, Chip antenna can offer excellent wireless performance.
• For some applications (for example, metallic enclosure or metallized plastic is used), using U.FL receptacle with an external antenna is a better choice, which can offer the best wireless performance.

NFC antenna interface¶

nRF52840 Connect Kit supports a Near Field Communication (NFC) tag. NFC uses two pins (NFC1 and NFC2) to connect the antenna. These pins are shared with GPIOs (P0.09 and P0.10).

An NFC antenna is a coil inductor, and together with capacitors to ground, they form a parallel resonant LC tank. Since the active device operates at 13.56 MHz, the passive device antenna should also resonate at that frequency.

The following figure shows the antenna and the parallel capacitors forming an LC tank circuit. The parallel capacitors, C_tune1 and C_tune2 are pre-mounted with 100pF capacitors.

Debug interface¶

nRF52840 Connect Kit supports Arm Serial Wire Debug (SWD) port, which makes it possible to connect external debuggers for debugging and programming. The I/O voltage of SWD should be 3.3V.

The following figure demonstrates how to connect an external debugger (for example, Pitaya-Link debug probe) for debugging:

The connections are listed in the table below: